[coreboot] VT-d support

[Himanshu Chauhan]

Hi,

VT-d requires support from BIOS. Does coreboot support VT-d?

Regards
Himanshu Chauhan

[ron minnich]

Post by Himanshu Chauhan
Hi,
VT-d requires support from BIOS. Does coreboot support VT-d?

what support does it need?

[Himanshu Chauhan]

Post by Himanshu Chauhan
Hi,
VT-d requires support from BIOS. Does coreboot support VT-d?
what support does it need?

BIOS adds DMAR and other entries in the ACPI table. I am not quite sure how these entries are formed exactly though.

https://www.mjmwired.net/kernel/Documentation/Intel-IOMMU.txt

http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf

Is anybody working on this?

Regards
Himanshu

[Zaolin]

You are asking for VT-d support. You are talking about Intel platforms ?

But for which specific platform you are asking for ? There are so many..

Post by Himanshu Chauhan

Post by Himanshu Chauhan
Hi,
VT-d requires support from BIOS. Does coreboot support VT-d?
what support does it need?

BIOS adds DMAR and other entries in the ACPI table. I am not quite sure how these entries are formed exactly though.
https://www.mjmwired.net/kernel/Documentation/Intel-IOMMU.txt
http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf
Is anybody working on this?
Regards
Himanshu

[Himanshu Chauhan]

Post by Zaolin
You are asking for VT-d support. You are talking about Intel platforms ?

Yes. I am talking about intel platforms. All CPUs that have VT-d support need support from motherboards as well. So any setup with VT-d enabled CPU and a motherboards that assists it, is what I am talking about.

Post by Zaolin
But for which specific platform you are asking for ? There are so many..

Post by Himanshu Chauhan

Post by Himanshu Chauhan
Hi,
VT-d requires support from BIOS. Does coreboot support VT-d?
what support does it need?

BIOS adds DMAR and other entries in the ACPI table. I am not quite sure how these entries are formed exactly though.
https://www.mjmwired.net/kernel/Documentation/Intel-IOMMU.txt
http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf
Is anybody working on this?
Regards
Himanshu

--
https://mail.coreboot.org/mailman/listinfo/coreboot

[Zoran Stojsavljevic]

Post by ron minnich
what support does it need?

Intel Virtualization Technology for Directed I/O" (VT-d). VT-d is a
virtualized IOMMU, so by using HYP type 1 there should be a VT-d driver
supporting VT-d HW extension (?), as my best understanding is

The practical implications are Graphics and Network Connectivity in Guests.
DMA Remapping is the feature of VT-d.

Good net pointer to read: https://unix.stackexchange.com/questions/34428/do-
virtualbox-or-vmware-use-the-intel-vt-d-feature

Post by ron minnich
Is anybody working on this?

Don't think so... If anything is done, I guess, it is done by simplistic
implementation of the feature called: pass-through (so guest by its own
drivers is using directly platform devices' HW bypassing HYP1, my best
guess).

Zoran

Post by ron minnich

Post by Himanshu Chauhan
Hi,
VT-d requires support from BIOS. Does coreboot support VT-d?

what support does it need?
--
https://mail.coreboot.org/mailman/listinfo/coreboot

[ron minnich]

The reason I ask about what you need is that on chromebooks the main
coreboot support came down to 'don't disable anything'.

The DMAR requirements are not met on all platforms. But even after boot you
can insert DMAR tables into kernels.

So there is a key distinction between required support and desired support,
and I wonder if you could figure out what is required and let us know what
it is.



On Mon, Jun 5, 2017 at 9:39 AM Zoran Stojsavljevic <

Post by Zoran Stojsavljevic

Post by ron minnich
what support does it need?

Intel Virtualization Technology for Directed I/O" (VT-d). VT-d is a
virtualized IOMMU, so by using HYP type 1 there should be a VT-d driver
supporting VT-d HW extension (?), as my best understanding is
The practical implications are Graphics and Network Connectivity in
Guests. DMA Remapping is the feature of VT-d.
https://unix.stackexchange.com/questions/34428/do-virtualbox-or-vmware-use-the-intel-vt-d-feature

Post by ron minnich
Is anybody working on this?

Don't think so... If anything is done, I guess, it is done by simplistic
implementation of the feature called: pass-through (so guest by its own
drivers is using directly platform devices' HW bypassing HYP1, my best
guess).
Zoran

Post by ron minnich

Post by Himanshu Chauhan
Hi,
VT-d requires support from BIOS. Does coreboot support VT-d?

what support does it need?
--
https://mail.coreboot.org/mailman/listinfo/coreboot

[Himanshu Chauhan]

The reason I ask about what you need is that on chromebooks the main coreboot support came down to 'don't disable anything’.

I think its can’t just be disabled. Its just that kernel is not given any knowledge about its existence. This is what I want to know. The commercial BIOSes give an option of “enable VT-d” support. What do they do when this option is selected? Can this be implemented in Coreboot? This probably brings me to your next question of what is required. I would spend some time to figure that out.

The DMAR requirements are not met on all platforms. But even after boot you can insert DMAR tables into kernels.
So there is a key distinction between required support and desired support, and I wonder if you could figure out what is required and let us know what it is.

BTW, Do we have core boot tested on Intel’s Atom based C3xxx family SoCs?

Post by ron minnich
what support does it need?

Intel Virtualization Technology for Directed I/O" (VT-d). VT-d is a virtualized IOMMU, so by using HYP type 1 there should be a VT-d driver supporting VT-d HW extension (?), as my best understanding is
The practical implications are Graphics and Network Connectivity in Guests. DMA Remapping is the feature of VT-d.
Good net pointer to read: https://unix.stackexchange.com/questions/34428/do-virtualbox-or-vmware-use-the-intel-vt-d-feature

Post by ron minnich
Is anybody working on this?

Don't think so... If anything is done, I guess, it is done by simplistic implementation of the feature called: pass-through (so guest by its own drivers is using directly platform devices' HW bypassing HYP1, my best guess).
Zoran
Hi,
VT-d requires support from BIOS. Does coreboot support VT-d?
what support does it need?
--
https://mail.coreboot.org/mailman/listinfo/coreboot

[ron minnich]

I think its can’t just be disabled.

oh, really? Why do you think that? Have you looked at the relevant MSR and
what is the basis of your claim?

ron

[Himanshu Chauhan]

Post by Himanshu Chauhan
I think its can’t just be disabled.
oh, really? Why do you think that? Have you looked at the relevant MSR and what is the basis of your claim?

I was just guessing what it could be. :)

Post by Himanshu Chauhan
ron

[ron minnich]

Post by Himanshu Chauhan

Post by ron minnich
oh, really? Why do you think that? Have you looked at the relevant MSR

and what is the basis of your claim?
I was just guessing what it could be. :)

I think it's a ton easier if you study on some simple hypervisors written
for VMX, it's a lot easier to know than to guess.

[Nico Huber]

Hi,

Post by Himanshu Chauhan

Post by ron minnich
The reason I ask about what you need is that on chromebooks the main
coreboot support came down to 'don't disable anything’.

I think its can’t just be disabled. Its just that kernel is not given
any knowledge about its existence. This is what I want to know. The
commercial BIOSes give an option of “enable VT-d” support. What do they
do when this option is selected? Can this be implemented in Coreboot?
This probably brings me to your next question of what is required. I
would spend some time to figure that out.

First thing, the firmware doesn't have to support it. It's only that
Intel chose _not_ to write per platform OS drivers and let the firm-
ware do the abstraction instead (I know a kernel that works pretty well
with VT-d even if there are no DMAR tables).

coreboot already handles VT-d support on some chipsets (GM45, Sandy/
Ivy Bridge come to mind). You can look how it's done there. If you are
lucky, you only need to add 20~30 lines to your chipset's code.

If your chipset needs special initialization, it's most probably docu-
mented in the BIOS Writer's Guide (BWG) or BIOS Specification. Though,
you need an NDA with Intel to get these.

Nico

[Zoran Stojsavljevic]

If you are lucky, you only need to add 20~30 lines to your chipset's code.

Could you, please, show us an explicit example (of these 20 to 30 lines of
code)?!

Zoran

Hi,

Post by ron minnich
The reason I ask about what you need is that on chromebooks the main
coreboot support came down to 'don't disable anything’.

I think its can’t just be disabled. Its just that kernel is not given
any knowledge about its existence. This is what I want to know. The
commercial BIOSes give an option of “enable VT-d” support. What do they
do when this option is selected? Can this be implemented in Coreboot?
This probably brings me to your next question of what is required. I
would spend some time to figure that out.

First thing, the firmware doesn't have to support it. It's only that
Intel chose _not_ to write per platform OS drivers and let the firm-
ware do the abstraction instead (I know a kernel that works pretty well
with VT-d even if there are no DMAR tables).
coreboot already handles VT-d support on some chipsets (GM45, Sandy/
Ivy Bridge come to mind). You can look how it's done there. If you are
lucky, you only need to add 20~30 lines to your chipset's code.
If your chipset needs special initialization, it's most probably docu-
mented in the BIOS Writer's Guide (BWG) or BIOS Specification. Though,
you need an NDA with Intel to get these.
Nico

[Nico Huber]

Post by Zoran Stojsavljevic

If you are lucky, you only need to add 20~30 lines to your chipset's code.

Could you, please, show us an explicit example (of these 20 to 30 lines of
code)?!

`src/northbridge/intel/sandybridge/iommu.c` and acpi_fill_dmar() in
`src/northbridge/intel/sandybridge/acpi.c`.

Nico

[Zoran Stojsavljevic]

Post by Nico Huber
`src/northbridge/intel/sandybridge/iommu.c` and acpi_fill_dmar() in
`src/northbridge/intel/sandybridge/acpi.c`.

I'll be back!

;-)

Zoran

Post by Nico Huber

Post by Zoran Stojsavljevic

If you are lucky, you only need to add 20~30 lines to your chipset's

code.

Post by Zoran Stojsavljevic
Could you, please, show us an explicit example (of these 20 to 30 lines

of

Post by Zoran Stojsavljevic
code)?!

`src/northbridge/intel/sandybridge/iommu.c` and acpi_fill_dmar() in
`src/northbridge/intel/sandybridge/acpi.c`.
Nico