Discussion:
installing Coreboot to T60(MX25L1605AM2C flash chip)
Martin T
2014-07-08 13:08:14 UTC
Permalink
Hi,

I have an IBM ThinkPad T60 laptop(1951-CTO) which uses BIOS(version
2.27) from Phoenix Technologies. I would like to replace this with
Coreboot and use SeaBIOS as a payload as I need to change the order of
boot devices from time to time. I do not need SeaBIOS for BIOS
callback functions as I use only Linux-based opeating systems on this
machine. Based on the instructions in Coreboot wiki, I downloaded the
flashrom source(r1711 according to ChangeLog file) and looked for the
definition of my flash chip in flashrom's flashchips.c file. My flash
chip is Macronix MX25L1605AM2C. What is the correct definition of my
flash chip in flashchips.c file? As one can see, there are three ones
which seem to match:

***@T60:~/flashrom-0.9.7# grep name flashchips.c | grep MX25L1605
.name = "MX25L1605",
.name = "MX25L1605A/MX25L1606E",
.name = "MX25L1605D/MX25L1608D",
***@T60:~/flashrom-0.9.7#


In addition, I tried to find the datasheet for MX25L1605AM2C to look
up the ID bytes the flash replies to the RES ID command and RES model
ID, but I wasn't able to find the exact data sheet. Or could I use the
datasheet of MX25L1605A(https://db.tt/oe6Cgm8K)?


regards,
Martin
--
coreboot mailing list: ***@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
Peter Stuge
2014-07-08 14:26:16 UTC
Permalink
What is the correct definition of my flash chip in flashchips.c file?
.name = "MX25L1605D/MX25L1608D",
This one.
I wasn't able to find the exact data sheet.
Look for MX25L1605D.


//Peter
--
coreboot mailing list: ***@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
The Gluglug
2014-07-08 15:12:37 UTC
Permalink
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

.model_id 0x14

.probe probe_spi_res1

.write spi_chip_write_1
Post by Peter Stuge
What is the correct definition of my flash chip in flashchips.c file?
.name = "MX25L1605D/MX25L1608D",
This one.
I wasn't able to find the exact data sheet.
Look for MX25L1605D.
//Peter
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/

iQEcBAEBAgAGBQJTvAplAAoJEP9Ft0z50c+U+gEH/jnEUD8mxiipwdHAw2hTx8TN
dlnjEzNtRnjCg4zSiFPf7AUmzTyE89H47H00VOZ3nxWwfAmmKtOys5w0uzEV5kCT
34MkMv8Ogyf6dZRqeGPZcVpQOrZ4iAsdy81bSfBOIeHXMvl3q1M+PS+EeKnIgHG8
UNTptn6OAq2yXFKp46jqjJ+Ubp47ICEbOKa9qntzMbdE3MOAvnKYwSLAbt4MYfUH
DVdB8dMPGLYeeSfxjM1Z9t7gDgSUBiyC0PvP5PLDURRq69lnQlFDgFjC+AJISMxq
3ZYkOtUY4V/G7B/y2zDYsCjAcCt7ybVC8W4WW5QE7ABwLyl6gDDnpndisE87LR4=
=tlVy
-----END PGP SIGNATURE-----
--
coreboot mailing list: ***@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
Martin T
2014-07-09 17:12:51 UTC
Permalink
Thanks for the replies! I modified the flashchips.c file accordingly:

***@T60:~/flashrom-0.9.7# grep -A 30 MX25L1605D flashchips.c
.name = "MX25L1605D/MX25L1608D",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = 0x14,
.total_size = 2048,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PREW,
.probe = probe_spi_res1,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 512} },
.block_erase = spi_block_erase_20,
}, {
.eraseblocks = { {64 * 1024, 32} },
.block_erase = spi_block_erase_d8,
}, {
.eraseblocks = { {2 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_60,
}, {
.eraseblocks = { {2 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_c7,
},
},
.printlock =
spi_prettyprint_status_register_default_bp3, /* bit6: Continously
Program (CP) mode */
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_1,
.read = spi_chip_read, /* Fast read (0x0B),
dual I/O supported */
.voltage = {2700, 3600},
***@T60:~/flashrom-0.9.7#


..and then compiled the flashrom. As a next step, I successfully
backed up the factory BIOS, downloaded
coreboot.rom(jenkins-coreboot-1837-1421-ge1163c1) for T60/T60p
platform and saved the last 65536 bytes of coreboot.rom into
top64k.bin file:

***@T60:~/flashrom-0.9.7# dd if=coreboot.rom of=top64k.bin bs=1
skip=$(($(stat -c %s coreboot.rom) - 0x10000)) count=64k
65536+0 records in
65536+0 records out
65536 bytes (66 kB) copied, 0.246173 s, 266 kB/s
***@T60:~/flashrom-0.9.7#

Then I verified that bytes from 1966081 to 2031617 in coreboot.rom are
filled with ones and wrote the content of top64k.bin file into this
area:

***@T60:~/flashrom-0.9.7# dd if=top64k.bin of=coreboot.rom bs=1
seek=$(($(stat -c %s coreboot.rom) - 0x20000)) count=64k conv=notrunc
65536+0 records in
65536+0 records out
65536 bytes (66 kB) copied, 0.170372 s, 385 kB/s
***@T60:~/flashrom-0.9.7#


As a final step I ran the bucts utility:

***@T60:~/bucts-dc27919# ./bucts 1
bucts utility version ''
Using LPC bridge 8086:27b9 at 0000:1f.00
Current BUC.TS=0 - 128kb address range 0xFFFE0000-0xFFFFFFFF is untranslated
Updated BUC.TS=1 - 64kb address ranges at 0xFFFE0000 and 0xFFFF0000 are swapped
***@T60:~/bucts-dc27919#


Am I ready to run "flashrom -p internal -w coreboot.rom" and
power-cycle the laptop? Should I make some adjustments in my GRUB
configuration in order to ensure that laptop boots to OS? At which
stage should I install the SeaBIOS? Is it possible to restore the
factory BIOS later(for example when I sell the laptop)?


regards,
Martin
Post by The Gluglug
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
.model_id 0x14
.probe probe_spi_res1
.write spi_chip_write_1
Post by Peter Stuge
What is the correct definition of my flash chip in flashchips.c file?
.name = "MX25L1605D/MX25L1608D",
This one.
I wasn't able to find the exact data sheet.
Look for MX25L1605D.
//Peter
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/
iQEcBAEBAgAGBQJTvAplAAoJEP9Ft0z50c+U+gEH/jnEUD8mxiipwdHAw2hTx8TN
dlnjEzNtRnjCg4zSiFPf7AUmzTyE89H47H00VOZ3nxWwfAmmKtOys5w0uzEV5kCT
34MkMv8Ogyf6dZRqeGPZcVpQOrZ4iAsdy81bSfBOIeHXMvl3q1M+PS+EeKnIgHG8
UNTptn6OAq2yXFKp46jqjJ+Ubp47ICEbOKa9qntzMbdE3MOAvnKYwSLAbt4MYfUH
DVdB8dMPGLYeeSfxjM1Z9t7gDgSUBiyC0PvP5PLDURRq69lnQlFDgFjC+AJISMxq
3ZYkOtUY4V/G7B/y2zDYsCjAcCt7ybVC8W4WW5QE7ABwLyl6gDDnpndisE87LR4=
=tlVy
-----END PGP SIGNATURE-----
--
http://www.coreboot.org/mailman/listinfo/coreboot
--
coreboot mailing list: ***@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
Loading...